DK-NIOS-2S60N【PDF 30/56 页】NIOS II KIT W/STRATIX II EP2S60N

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CompactFlash Connector (CON3)

Table 2–6. CompactFlash (CON3) Pin Table (Part 2 of 2)

Pin on

CompactFlash

(CON3)

32

33

34

35

36

37

38

39

40

41

42

43

44

45

46

47

48

49

50

Note to Table 2–6

CompactFlash

Function (U60)

-CE2

-VS1

-OIORD

-IOWR

-WE

RDY/BSY

VCC

-CSEL

-VS2

RESET

-WAIT

-INPACK

-REG

BVD2

BVD1

D081

D091

D101

GND

Connects to (1)

Y16

GND (3)

C7

A7

E10

J11

Y17 ( 2)

GND (3)

no connect (3)

(4)

D7

B7

B8

G11

C11

J9

A3

C3

GND (3)

(1)

(2)

(3)

(4)

All pin numbers represent I/O pins on the FPGA, unless

otherwise noted.

This FPGA I/O pin controls a power MOSFET that supplies 5V

VCC to CON3.

This pin does not connect to the FPGA directly.

RESET is driven by the EPM7128AE configuration controller

device.

f

For more information on the CompactFlash connector (CON3), refer to

www.compactflash.org and www.molex.com .

2–22

Nios Development Board Reference Manual, Stratix II Edition

Altera Corporation

July 2005

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